ANT. JAVIER DÍAZ ALONSO

Departamento de Arquitectura y Tecnología de Computadores

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Currently, I work as associate professor at the Computer Architecture and Technology department of the University of Granada.

 

EDUCATION

¨ M.Sc. Degree in Physics in 2000 and in Electronic Engineering in 2002 at the University of Granada, Spain.

¨ Fifth International UJI Robotics School, First European Summer School on NeuroRobotics, Benicassim, Spain, September 19-23, 2005.

¨ Short stay at  Aalborg University in Copenhagen, Denmark, January 23 - April 27, 2006.

¨  PhD. degree in 2006 at the University of Granada.

¨ Neuromorphic Engineering Workshop, Telluride CO, USA June 29-July 19,2008.

¨ Short Stay at CERN, BE-CO-HT grupo, Genoa, Switzerland. June 17 -  August 20 2012

¨ CERN Accelerator School. Granada, Spain 28 October—9 November 2012

 

RESEARCH INTERESTS

My main research interests are in the fields:

¨ Time transfer & frequency distribution: clock synchronization, frequency signal distribution based on Ethernet protocols and optical links.  Applications to particle accelerators (CERN-GSI) and Telescope arrays.

¨ Safety-critical Systems: Hazard analysis, RTOS, Certification (IEC-61508, DO-254, DO-178B), Run-time monitoring, System modelling.

¨ Real-time and embedded systems: high performance computing & real-time, FPGA, DSP, SoC, GPUs and software acceleration.

¨ Computer Vision & Robotics: Motion algorithms, object tracking, stereo-vision and image processing applications.

¨ Neuromorphic engineering, bio-inspired processing systems and its applications.

 

SELECTED PROYECTS PARTICIPATION

White-Rabbit , EMC2 (by industry subcontracting), SKA and VITVIR (P11-TIC-8120).

EMC2 

In the past, I participate in the European Projects FP7-Artemis RECOMPTOMSY, DRIVSCO and ECOVISION

       

     

I also collaborate in other EU projects (SPIKEFORCE, SENSOPAC, HUMAN-BRAIN) and national/regional/local projects as well as industrial ones in the fields previously described.

 

TEACHING

I teach on topics related with:

¨  Hardware acceleration of algorithms.

¨ FPGA SoCs and embedded systems.

¨ Computer vision architectures

¨   Safety-critical systems

 

 

Departamento de Arquitectura y Tecnología de Computadores. ETSII Informática y Telecomunicaciones. C/ Periodista Daniel  Saucedo Aranda s/n.

E-18071, Granada (SPAIN).

Address for correspondence

Phone:     +34 958242392.

Fax:          +34 958248993

Email: jda@ugr.es

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Last updated 1th of June  2014